[AArch64]SME2 Single and Multi vector Shift and Multiply instructions

[AArch64]SME2 Single and Multi vector  Shift and Multiply instructions

This patch adds the assembly/disassembly for the following instructions:

  SQRSHR (four registers): Multi-vector signed saturating rounding shift right narrow by immediate.
         (two registers): Multi-vector signed saturating rounding shift right narrow by immediate.
  SQRSHRN: Multi-vector signed saturating rounding shift right narrow by immediate and interleave.
  SQRSHRU (four registers): Multi-vector signed saturating rounding shift right unsigned narrow by immediate.
          (two registers): Multi-vector signed saturating rounding shift right unsigned narrow by immediate.
  SQRSHRUN: Multi-vector signed saturating rounding shift right unsigned narrow by immediate and interleave.
  UQRSHR (four registers): Multi-vector unsigned saturating rounding shift right narrow by immediate
         (two registers): Multi-vector unsigned saturating rounding shift right narrow by immediate.
  UQRSHRN: Multi-vector unsigned saturating rounding shift right narrow by immediate and interleave.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D136150