Remove the TargetMachine forwards for TargetSubtargetInfo based
authorEric Christopher <echristo@gmail.com>
Mon, 4 Aug 2014 21:25:23 +0000 (21:25 +0000)
committerEric Christopher <echristo@gmail.com>
Mon, 4 Aug 2014 21:25:23 +0000 (21:25 +0000)
commitd913448b38bab6ace92ae5057b917eb57035f83b
treef2050928fa5994c44fab60d66e7d89e7cc7d7a4f
parentacc8ef273b1c3796b0fc7f19aa347115b4bc2ea4
Remove the TargetMachine forwards for TargetSubtargetInfo based
information and update all callers. No functional change.

llvm-svn: 214781
297 files changed:
llvm/docs/GarbageCollection.rst
llvm/include/llvm/CodeGen/LiveRangeEdit.h
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
llvm/include/llvm/CodeGen/SelectionDAGISel.h
llvm/include/llvm/Target/TargetMachine.h
llvm/include/llvm/Target/TargetSubtargetInfo.h
llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
llvm/lib/CodeGen/Analysis.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
llvm/lib/CodeGen/AsmPrinter/ErlangGCPrinter.cpp
llvm/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
llvm/lib/CodeGen/AtomicExpandLoadLinkedPass.cpp
llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
llvm/lib/CodeGen/BranchFolding.cpp
llvm/lib/CodeGen/CalcSpillWeights.cpp
llvm/lib/CodeGen/CallingConvLower.cpp
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
llvm/lib/CodeGen/DFAPacketizer.cpp
llvm/lib/CodeGen/DeadMachineInstructionElim.cpp
llvm/lib/CodeGen/DwarfEHPrepare.cpp
llvm/lib/CodeGen/EarlyIfConversion.cpp
llvm/lib/CodeGen/ErlangGC.cpp
llvm/lib/CodeGen/ExecutionDepsFix.cpp
llvm/lib/CodeGen/ExpandISelPseudos.cpp
llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
llvm/lib/CodeGen/GCStrategy.cpp
llvm/lib/CodeGen/GlobalMerge.cpp
llvm/lib/CodeGen/IfConversion.cpp
llvm/lib/CodeGen/InlineSpiller.cpp
llvm/lib/CodeGen/LLVMTargetMachine.cpp
llvm/lib/CodeGen/LiveDebugVariables.cpp
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/lib/CodeGen/LiveRegMatrix.cpp
llvm/lib/CodeGen/LiveStackAnalysis.cpp
llvm/lib/CodeGen/LiveVariables.cpp
llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/lib/CodeGen/MachineBlockPlacement.cpp
llvm/lib/CodeGen/MachineCSE.cpp
llvm/lib/CodeGen/MachineCombiner.cpp
llvm/lib/CodeGen/MachineCopyPropagation.cpp
llvm/lib/CodeGen/MachineFunction.cpp
llvm/lib/CodeGen/MachineInstr.cpp
llvm/lib/CodeGen/MachineInstrBundle.cpp
llvm/lib/CodeGen/MachineLICM.cpp
llvm/lib/CodeGen/MachineRegisterInfo.cpp
llvm/lib/CodeGen/MachineSSAUpdater.cpp
llvm/lib/CodeGen/MachineScheduler.cpp
llvm/lib/CodeGen/MachineSink.cpp
llvm/lib/CodeGen/MachineTraceMetrics.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/CodeGen/OptimizePHIs.cpp
llvm/lib/CodeGen/PHIElimination.cpp
llvm/lib/CodeGen/PeepholeOptimizer.cpp
llvm/lib/CodeGen/PostRASchedulerList.cpp
llvm/lib/CodeGen/ProcessImplicitDefs.cpp
llvm/lib/CodeGen/PrologEpilogInserter.cpp
llvm/lib/CodeGen/RegAllocFast.cpp
llvm/lib/CodeGen/RegAllocGreedy.cpp
llvm/lib/CodeGen/RegAllocPBQP.cpp
llvm/lib/CodeGen/RegisterClassInfo.cpp
llvm/lib/CodeGen/RegisterCoalescer.cpp
llvm/lib/CodeGen/RegisterPressure.cpp
llvm/lib/CodeGen/RegisterScavenging.cpp
llvm/lib/CodeGen/ScheduleDAG.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/CodeGen/SjLjEHPrepare.cpp
llvm/lib/CodeGen/Spiller.cpp
llvm/lib/CodeGen/SplitKit.cpp
llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp
llvm/lib/CodeGen/StackMaps.cpp
llvm/lib/CodeGen/StackProtector.cpp
llvm/lib/CodeGen/StackSlotColoring.cpp
llvm/lib/CodeGen/TailDuplication.cpp
llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/CodeGen/TargetSchedule.cpp
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
llvm/lib/CodeGen/VirtRegMap.cpp
llvm/lib/ExecutionEngine/JIT/JIT.cpp
llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp
llvm/lib/LTO/LTOCodeGenerator.cpp
llvm/lib/LTO/LTOModule.cpp
llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
llvm/lib/Target/AArch64/AArch64CallingConvention.td
llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
llvm/lib/Target/AArch64/AArch64FastISel.cpp
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AArch64TargetMachine.h
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/lib/Target/ARM/A15SDOptimizer.cpp
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/lib/Target/ARM/ARMCodeEmitter.cpp
llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
llvm/lib/Target/ARM/ARMFastISel.cpp
llvm/lib/Target/ARM/ARMFrameLowering.cpp
llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMInstrInfo.cpp
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/lib/Target/ARM/ARMTargetMachine.h
llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
llvm/lib/Target/ARM/MLxExpansionPass.cpp
llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
llvm/lib/Target/ARM/Thumb1RegisterInfo.cpp
llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
llvm/lib/Target/Hexagon/HexagonCallingConvLower.cpp
llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
llvm/lib/Target/Hexagon/HexagonExpandPredSpillCode.cpp
llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
llvm/lib/Target/Hexagon/HexagonMachineScheduler.h
llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
llvm/lib/Target/Hexagon/HexagonPeephole.cpp
llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
llvm/lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp
llvm/lib/Target/Hexagon/HexagonSubtarget.h
llvm/lib/Target/Hexagon/HexagonTargetMachine.h
llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
llvm/lib/Target/Hexagon/HexagonVarargsCallingConvention.h
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInst.cpp
llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
llvm/lib/Target/MSP430/MSP430FrameLowering.cpp
llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
llvm/lib/Target/MSP430/MSP430MCInstLower.cpp
llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp
llvm/lib/Target/MSP430/MSP430Subtarget.h
llvm/lib/Target/MSP430/MSP430TargetMachine.h
llvm/lib/Target/Mips/Mips16FrameLowering.cpp
llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
llvm/lib/Target/Mips/Mips16ISelLowering.cpp
llvm/lib/Target/Mips/Mips16RegisterInfo.cpp
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
llvm/lib/Target/Mips/MipsCodeEmitter.cpp
llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
llvm/lib/Target/Mips/MipsFastISel.cpp
llvm/lib/Target/Mips/MipsFrameLowering.cpp
llvm/lib/Target/Mips/MipsISelLowering.cpp
llvm/lib/Target/Mips/MipsLongBranch.cpp
llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
llvm/lib/Target/Mips/MipsSEISelLowering.cpp
llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
llvm/lib/Target/Mips/MipsSubtarget.h
llvm/lib/Target/Mips/MipsTargetMachine.h
llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
llvm/lib/Target/NVPTX/NVPTXSubtarget.h
llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
llvm/lib/Target/PowerPC/PPCCodeEmitter.cpp
llvm/lib/Target/PowerPC/PPCFastISel.cpp
llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/lib/Target/PowerPC/PPCTargetMachine.h
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp
llvm/lib/Target/R600/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/R600/AMDGPUISelLowering.cpp
llvm/lib/Target/R600/AMDGPUInstrInfo.cpp
llvm/lib/Target/R600/AMDGPUMCInstLower.cpp
llvm/lib/Target/R600/AMDGPUSubtarget.h
llvm/lib/Target/R600/AMDGPUTargetMachine.h
llvm/lib/Target/R600/AMDGPUTargetTransformInfo.cpp
llvm/lib/Target/R600/AMDILCFGStructurizer.cpp
llvm/lib/Target/R600/R600ClauseMergePass.cpp
llvm/lib/Target/R600/R600ControlFlowFinalizer.cpp
llvm/lib/Target/R600/R600EmitClauseMarkers.cpp
llvm/lib/Target/R600/R600ExpandSpecialInstrs.cpp
llvm/lib/Target/R600/R600ISelLowering.cpp
llvm/lib/Target/R600/R600InstrInfo.cpp
llvm/lib/Target/R600/R600OptimizeVectorRegisters.cpp
llvm/lib/Target/R600/R600Packetizer.cpp
llvm/lib/Target/R600/SIFixSGPRCopies.cpp
llvm/lib/Target/R600/SIFixSGPRLiveRanges.cpp
llvm/lib/Target/R600/SIISelLowering.cpp
llvm/lib/Target/R600/SIInsertWaits.cpp
llvm/lib/Target/R600/SIInstrInfo.td
llvm/lib/Target/R600/SILowerControlFlow.cpp
llvm/lib/Target/R600/SILowerI1Copies.cpp
llvm/lib/Target/R600/SIShrinkInstructions.cpp
llvm/lib/Target/Sparc/DelaySlotFiller.cpp
llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
llvm/lib/Target/Sparc/SparcCodeEmitter.cpp
llvm/lib/Target/Sparc/SparcFrameLowering.cpp
llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
llvm/lib/Target/Sparc/SparcISelLowering.cpp
llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
llvm/lib/Target/Sparc/SparcSubtarget.h
llvm/lib/Target/Sparc/SparcTargetMachine.h
llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
llvm/lib/Target/SystemZ/SystemZSubtarget.h
llvm/lib/Target/SystemZ/SystemZTargetMachine.h
llvm/lib/Target/TargetLoweringObjectFile.cpp
llvm/lib/Target/TargetMachine.cpp
llvm/lib/Target/TargetMachineC.cpp
llvm/lib/Target/X86/X86AsmPrinter.cpp
llvm/lib/Target/X86/X86CodeEmitter.cpp
llvm/lib/Target/X86/X86FastISel.cpp
llvm/lib/Target/X86/X86FixupLEAs.cpp
llvm/lib/Target/X86/X86FloatingPoint.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/lib/Target/X86/X86PadShortFunction.cpp
llvm/lib/Target/X86/X86RegisterInfo.cpp
llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
llvm/lib/Target/X86/X86Subtarget.h
llvm/lib/Target/X86/X86TargetMachine.h
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/lib/Target/X86/X86VZeroUpper.cpp
llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
llvm/lib/Target/XCore/XCoreFrameLowering.cpp
llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
llvm/lib/Target/XCore/XCoreISelLowering.cpp
llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
llvm/lib/Target/XCore/XCoreSubtarget.h
llvm/lib/Target/XCore/XCoreTargetMachine.h
llvm/lib/Target/XCore/XCoreTargetObjectFile.cpp
llvm/tools/llc/llc.cpp
llvm/utils/TableGen/CallingConvEmitter.cpp