clk: aspeed: Fix is_enabled for certain clocks
authorEddie James <eajames@linux.vnet.ibm.com>
Thu, 8 Mar 2018 20:57:19 +0000 (14:57 -0600)
committerStephen Boyd <sboyd@kernel.org>
Thu, 15 Mar 2018 18:11:43 +0000 (11:11 -0700)
commitd90c76bb61128ed9022b9418c31c4749764b6cd9
tree4805e03a5d45838fdae9f51132781a8cfe7f23fd
parent55c19eee3b471e7ca7e38783836f7b7137c9d14f
clk: aspeed: Fix is_enabled for certain clocks

Some of the Aspeed clocks are disabled by setting the relevant bit in
the "clock stop control" register to one, while others are disabled by
setting their bit to zero. The driver already uses a flag per gate  to
identify this behavior, but doesn't apply it in the clock is_enabled
function.

Use the existing gate flag to correctly return whether or not a clock
is enabled in the aspeed_clk_is_enabled function.

Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Fixes: 6671507f0fbd ("clk: aspeed: Handle inverse polarity of USB port 1 clock gate")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-aspeed.c