[PowerPC] mapping hardward loop intrinsics to powerpc pseudo
authorChen Zheng <czhengsz@cn.ibm.com>
Fri, 8 Apr 2022 07:24:46 +0000 (03:24 -0400)
committerChen Zheng <czhengsz@cn.ibm.com>
Tue, 9 Aug 2022 01:34:20 +0000 (21:34 -0400)
commitd9004dfbabc62887f09775297436792077ce4496
tree95d30a719d45eeb2c831de019d65e96b9bb9a389
parent2eb50cee11ccbfac71eeb7687b9f136d95fc7f52
[PowerPC] mapping hardward loop intrinsics to powerpc pseudo

Map hardware loop intrinsics loop_decrement and set_loop_iteration
to the new PowerPC pseudo instructions, so that the hardware loop
intrinsics will be expanded to normal cmp+branch form or ctrloop
form based on the CTR register usage on MIR level.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D123366
llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/CodeGen/PowerPC/ctrloops-pseudo.ll
llvm/test/CodeGen/PowerPC/ctrloops32.mir
llvm/test/CodeGen/PowerPC/ctrloops64.mir
llvm/test/CodeGen/PowerPC/sms-phi.ll