util: completely rewrite and do AMD Zen L3 cache pinning correctly
authorMarek Olšák <marek.olsak@amd.com>
Tue, 6 Oct 2020 23:05:29 +0000 (19:05 -0400)
committerMarge Bot <eric+marge@anholt.net>
Fri, 30 Oct 2020 05:07:57 +0000 (05:07 +0000)
commitd8ea50996580a34b17059ec5456c75bb0d1f8750
treea5d00e4f52cfd2210efd8e8140f4989f2e1a4fba
parent4f2c2307f9e82498b2374e95aa8a17d0eb80531c
util: completely rewrite and do AMD Zen L3 cache pinning correctly

This queries the CPU cache topology correctly.

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>
src/gallium/auxiliary/util/u_threaded_context.c
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
src/mesa/state_tracker/st_draw.c
src/util/u_cpu_detect.c
src/util/u_cpu_detect.h
src/util/u_thread.h