spi: cadence-quadspi: fix protocol setup for non-1-1-X operations
authorMatthias Schiffer <matthias.schiffer@ew.tq-group.com>
Thu, 31 Mar 2022 11:08:19 +0000 (13:08 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 20 Apr 2022 07:34:16 +0000 (09:34 +0200)
commitd8860f1f9e41e7072ed4fae5316dd43ed83beb64
tree438211edb0c52acae7ddb2d330fcafd656135bd3
parent6d48df73827239235c0d52d39d82c19df90b6eb9
spi: cadence-quadspi: fix protocol setup for non-1-1-X operations

[ Upstream commit 97e4827d775faa9a32b5e1a97959c69dd77d17a3 ]

cqspi_set_protocol() only set the data width, but ignored the command
and address width (except for 8-8-8 DTR ops), leading to corruption of
all transfers using 1-X-X or X-X-X ops. Fix by setting the other two
widths as well.

While we're at it, simplify the code a bit by replacing the
CQSPI_INST_TYPE_* constants with ilog2().

Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash with 1-4-4
read and write operations.

Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220331110819.133392-1-matthias.schiffer@ew.tq-group.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/spi/spi-cadence-quadspi.c