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[AArch64] Support selecting TPIDR_EL[1-3] as the thread base
authorOliver Stannard <oliver.stannard@arm.com>
Fri, 29 Mar 2019 13:32:41 +0000 (13:32 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Fri, 29 Mar 2019 13:32:41 +0000 (13:32 +0000)
commitd83a559318a5302ef81a916bc3b7502c1b228667
tree0b755441705e6ad874fa3ec31630f6e172eff882tree | snapshot
parent7f33574be3416b71ef4fc3384cbf33b2a9bd0a81commit | diff
[AArch64] Support selecting TPIDR_EL[1-3] as the thread base

Add an -mtp=el[0-3] option to select which of the AArch64 thread ID registers
will be used for the TLS base pointer.

This is a followup to rL356657 which added subtarget features to enable
accesses to the privileged thread ID registers.

Patch by Philip Derrin!

Differential revision: https://reviews.llvm.org/D59631

llvm-svn: 357250
clang/include/clang/Driver/Options.td diff | blob | history
clang/lib/Driver/ToolChains/Arch/AArch64.cpp diff | blob | history
clang/test/Driver/clang-translation.c diff | blob | history
Domain: System / Toolchain;