ARM: dts: Use drive strength 3 for SD pins for exynos4
authorTomasz Figa <t.figa@samsung.com>
Wed, 21 Nov 2012 15:29:47 +0000 (00:29 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 21 Nov 2012 15:39:01 +0000 (00:39 +0900)
commitd80162eccd56c40228e1232de8a203e8553b20a4
tree0bb36777441be0608e831a5cc5a78cfbe21bd61e
parent91d88f038ec61bc2d66f72c615629827350c5df1
ARM: dts: Use drive strength 3 for SD pins for exynos4

This patch modifies pin control groups of SD pins on EXYNOS4210
and EXYNOS4X12 to use drive strength 3 as a default value which
corresponds to S5P_GPIO_DRVSTR_LV4 in legacy non-DT code.

This is needed at least on Origen board for sdhci2 to work and
if any other drive strength is required on each board, we can
overide it.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited commit message]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos4210-pinctrl.dtsi
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi