fpga: xilinx: add bitstream flags to driver desc
authorOleksandr Suvorov <oleksandr.suvorov@foundries.io>
Fri, 22 Jul 2022 14:16:04 +0000 (17:16 +0300)
committerMichal Simek <michal.simek@amd.com>
Tue, 26 Jul 2022 07:34:21 +0000 (09:34 +0200)
commitd7fcbfc19b4e83930a90c834046d4bf7dc3adefe
treeaeee634633d84e0bc399e70640807043edf4686e
parentf18adf106576f298ead743a02800c6fdc90d884c
fpga: xilinx: add bitstream flags to driver desc

Store a set of supported bitstream types in xilinx_desc structure.
It will be used to determine whether an FPGA image is able to be
loaded with a given driver.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
arch/arm/mach-zynq/cpu.c
board/xilinx/versal/board.c
board/xilinx/zynqmp/zynqmp.c
include/versalpl.h
include/xilinx.h
include/zynqmppl.h