media: dt-bindings: convert CODA VPU bindings to yaml
authorPhilipp Zabel <p.zabel@pengutronix.de>
Wed, 23 Sep 2020 08:21:12 +0000 (10:21 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Mon, 16 Nov 2020 09:31:13 +0000 (10:31 +0100)
commitd7dc892dd46d8d5c733b39c6631a7f616cc95d94
treec73979e315b9cea3bba6355694287b5346453f6d
parentb20d9fac5bf54d5909d8538431bf53d83fbe5509
media: dt-bindings: convert CODA VPU bindings to yaml

Convert to YAML and add generic IP core compatibles "cnm,codadx6",
"cnm,codahx4", "cnm,coda7541", and "cnm,coda960" in addition to the SoC
specific compatibles. The new generic compatibles are already used in
the SoC device trees and replace the free form comments. For example:

- compatible : should be "fsl,<chip>-src" for i.MX SoCs:
  (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27

turns into:

properties:
  compatible:
    oneOf:
      - items:
          - const: fsl,imx27-vpu
          - const: cnm,codadx6

This allows to properly specify the secondary JPEG unit interrupt that
is only present on cnm,coda960.

Also add the missing "fsl,imx6dl-vpu", "cnm,coda960" compatible.
The AXI bus connection to the internal SRAM is different between i.MX6Q
and i.MX6DL, which requires the driver to load a different firmware
depending on the SoC.

Further, specify the power-domain property for i.MX6 and change the
clock order from "ahb", "per" to "per", "ahb". This order is currently
used in all SoC device trees.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Documentation/devicetree/bindings/media/coda.txt [deleted file]
Documentation/devicetree/bindings/media/coda.yaml [new file with mode: 0644]
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