drm/i915/bxt: Don't toggle power well 1 on-demand
authorImre Deak <imre.deak@intel.com>
Fri, 1 Apr 2016 13:02:42 +0000 (16:02 +0300)
committerImre Deak <imre.deak@intel.com>
Fri, 15 Apr 2016 11:48:18 +0000 (14:48 +0300)
commitd7d7c9ee699a0b85de0023433cdbd8f965e1ac08
tree30dc18dd7adb6bd3bfd73826481fdad6cf844bba
parentd7d33fd85a6574ddce4cc0340f1856434b6a38ec
drm/i915/bxt: Don't toggle power well 1 on-demand

Power well 1 is managed by the DMC firmware so don't toggle it on-demand
from the driver. This means we need to follow the BSpec display
initialization sequence during driver loading and resuming (both system
and runtime) and enable power well 1 only once there. Afterwards DMC
will toggle power well 1 whenever entering/exiting DC5.

For this to work we also need to do away getting the PLL power domain,
since that just kept runtime PM disabled for good.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459515767-29228-12-git-send-email-imre.deak@intel.com
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dpll_mgr.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_runtime_pm.c