drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP
authorCong Yang <yangcong5@huaqin.corp-partner.google.com>
Mon, 20 Nov 2023 02:01:09 +0000 (10:01 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 3 Dec 2023 06:33:04 +0000 (07:33 +0100)
commitd75f7c1bd8fd0144b766239838e250e5aee9e375
treef242b3b1c1aef418c6d25df7fa7cc00541816924
parent79b5228e9511a40ce722c2c75b9fdb48c6eae7ce
drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[ Upstream commit cea7008190ad65b4aaae6e94667a358d2c10a696 ]

The refresh reported by modetest is 60.46Hz, and the actual measurement
is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
pixel clock to fix it. After repair, modetest and actual measurement were
all 60.01Hz.

Modetest refresh = Pixel CLK/ htotal* vtotal, but measurement frame rate
is HS->LP cycle time(Vblanking). Measured frame rate is not only affecte
by Htotal/Vtotal/pixel clock, also affected by Lane-num/PixelBit/LineTime
/DSI CLK. Assume that the DSI controller could not make the mode that we
requested(presumably it's PLL couldn't generate the exact pixel clock?).
If you use a different DSI controller, you may need to readjust these
parameters. Now this panel looks like it's only used by me on the MTK
platform, so let's change this set of parameters.

Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel")
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20231120020109.3216343-1-yangcong5@huaqin.corp-partner.google.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c