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[RISCV] Add bf16 as a valid type for the FPR16 register class.
authorCraig Topper <craig.topper@sifive.com>
Mon, 17 Jul 2023 15:30:40 +0000 (08:30 -0700)
committerCraig Topper <craig.topper@sifive.com>
Mon, 17 Jul 2023 15:30:40 +0000 (08:30 -0700)
commitd71329773d9ac0ba8cf570dc0d5ad89ce20a00c2
tree0864ea77c974ed40d5597aa39c858885e71caa2dtree | snapshot
parent7e78ecfe10ea9071234de8d385b87d338d280266commit | diff
[RISCV] Add bf16 as a valid type for the FPR16 register class.

This makes it possible for D153234 to use the FPR16 register class
for bf16 instructions.

Differential Revision: https://reviews.llvm.org/D155418
llvm/lib/Target/RISCV/RISCVInstrInfoD.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoF.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td diff | blob | history
llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td diff | blob | history
llvm/lib/Target/RISCV/RISCVRegisterInfo.td diff | blob | history
Domain: System / Toolchain;