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(parent: db1e3df) | patch
armv8:fsl-layerscape: Add support for Chassis 3.2
authorPriyanka Jain <priyanka.jain@nxp.com>
Mon, 29 Oct 2018 09:11:29 +0000 (09:11 +0000)
committerYork Sun <york.sun@nxp.com>
Thu, 6 Dec 2018 22:37:19 +0000 (14:37 -0800)
commitd6fdec211f7913c97917ba262fa257fdcb6b000e
treed4cbd076e35f9c0584230916eb94e5cd88173ddatree | snapshot
parentdb1e3df7ce71369a6b48382550df661f41dd5826commit | diff
armv8:fsl-layerscape: Add support for Chassis 3.2

NXP layerscape architecture Chassis 3.2 builds upon chassis3
architecture with changes like DDR Memory map change,
removal of IFC and support of upto 8 I2C controller.

Patch add README.lsch3_2 and the above changes under
macro CONFIG_NXP_LSCH3_2.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/cpu.c diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3_2 [new file with mode: 0644] blob
arch/arm/include/asm/arch-fsl-layerscape/cpu.h diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h diff | blob | history
Domain: System / Kernel;