x86/cpufeatures: Add PerfMonV2 feature bit
authorSandipan Das <sandipan.das@amd.com>
Thu, 21 Apr 2022 05:46:53 +0000 (11:16 +0530)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 4 May 2022 09:17:15 +0000 (11:17 +0200)
commitd6d0c7f681fda1d07e005c8f653e578b77a0eb40
treef805d62b2c7f27d04c69c8156fedb925eab7ac2d
parent78ed93d72ded679e3caf0758357209887bda885f
x86/cpufeatures: Add PerfMonV2 feature bit

CPUID leaf 0x80000022 i.e. ExtPerfMonAndDbg advertises some
new performance monitoring features for AMD processors.

Bit 0 of EAX indicates support for Performance Monitoring
Version 2 (PerfMonV2) features. If found to be set during
PMU initialization, the EBX bits of the same CPUID function
can be used to determine the number of available PMCs for
different PMU types. Additionally, Core PMCs can be managed
using new global control and status registers.

For better utilization of feature words, PerfMonV2 is added
as a scattered feature bit.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/c70e497e22f18e7f05b025bb64ca21cc12b17792.1650515382.git.sandipan.das@amd.com
arch/x86/include/asm/cpufeatures.h
arch/x86/kernel/cpu/scattered.c