net/mlx5: Refactor accel IPSec code
authorAviad Yehezkel <aviadye@mellanox.com>
Thu, 18 Jan 2018 11:05:48 +0000 (13:05 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Wed, 7 Mar 2018 23:54:34 +0000 (15:54 -0800)
commitd6c4f0298cec8c4c88d33aca17c066995e92fe91
treef27c22b032d0738ae32d7abe63f2e083a56f071b
parentaf9fe19d660e333ca9b0a6e1506e684a1126b9e7
net/mlx5: Refactor accel IPSec code

The current code has one layer that executed FPGA commands and
the Ethernet part directly used this code. Since downstream patches
introduces support for IPSec in mlx5_ib, we need to provide some
abstractions. This patch refactors the accel code into one layer
that creates a software IPSec transformation and another one which
creates the actual hardware context.
The internal command implementation is now hidden in the FPGA
core layer. The code also adds the ability to share FPGA hardware
contexts. If two contexts are the same, only a reference count
is taken.

Signed-off-by: Aviad Yehezkel <aviadye@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.h
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h
include/linux/mlx5/accel.h
include/linux/mlx5/mlx5_ifc_fpga.h