rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)
authorMarek Szyprowski <m.szyprowski@samsung.com>
Mon, 25 May 2020 11:39:55 +0000 (13:39 +0200)
committerMatthias Brugger <mbrugger@suse.com>
Thu, 9 Jul 2020 13:46:12 +0000 (15:46 +0200)
commitd69ddf24944162745665a45fef00a2115d371dbe
tree25991230dff7c0a288defaebe4e2244dc25b25c8
parentc44b3f523c48b544f9268410a9e0c26ea6fb7c5c
rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 64bit)

Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
arch/arm/mach-bcm283x/init.c