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genxml: Add the CACHE_MODE_0 register on gen9
authorJason Ekstrand <jason.ekstrand@intel.com>
Thu, 2 Feb 2017 00:39:32 +0000 (16:39 -0800)
committerJason Ekstrand <jason.ekstrand@intel.com>
Tue, 14 Feb 2017 22:18:55 +0000 (14:18 -0800)
commitd665c51eea4e85cb5a9e72f9a5cf1242795eda8a
treeb970496fd9ac587938fc9b4d2eb9654563ab8ce2tree | snapshot
parent028e1137e67bb83ebb97a58d39033d76ce77f8cecommit | diff
genxml: Add the CACHE_MODE_0 register on gen9

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
src/intel/genxml/gen9.xml diff | blob | history
Domain: Graphics System / GL;