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(parent: b2f06bd) | patch
[AMDGPU] Add missing AReg classes
authorJay Foad <jay.foad@amd.com>
Fri, 17 Apr 2020 08:25:37 +0000 (09:25 +0100)
committerJay Foad <jay.foad@amd.com>
Wed, 22 Apr 2020 12:10:37 +0000 (13:10 +0100)
commitd625b4b081f9ea2d96d5bdfc1f05925b30d8b1a3
tree6919ebee1509ebdcd6fa1724aa054448b51d1787tree | snapshot
parentb2f06bd20bdec80f2637463644b690f54fe09fdccommit | diff
[AMDGPU] Add missing AReg classes

Add 96-bit, 160-bit and 256-bit AReg classes to match VReg and SReg.
NFC as far as I know, but it may avoid weird legalization problems.

Differential Revision: https://reviews.llvm.org/D78348
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp diff | blob | history
llvm/lib/Target/AMDGPU/AMDGPURegisterBanks.td diff | blob | history
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp diff | blob | history
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp diff | blob | history
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIISelLowering.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIRegisterInfo.td diff | blob | history
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp diff | blob | history
Domain: System / Toolchain;