[ARM][SchedModels] Convert IsLdrAm3NegRegOffPred to MCSchedPredicate
authorEvgeny Leviant <eleviant@accesssoftek.com>
Mon, 26 Oct 2020 08:43:02 +0000 (11:43 +0300)
committerEvgeny Leviant <eleviant@accesssoftek.com>
Mon, 26 Oct 2020 08:43:02 +0000 (11:43 +0300)
commitd613e39d52d263823324a695614c3c2981e94927
tree1e38674807d67da8cae3e3521c01dc0363cbabba
parent8000d277bafa15f52061961e1ff1020306487e38
[ARM][SchedModels] Convert IsLdrAm3NegRegOffPred to MCSchedPredicate

Differential revision: https://reviews.llvm.org/D90045
llvm/include/llvm/Target/TargetInstrPredicate.td
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/lib/Target/ARM/ARMSchedule.td
llvm/lib/Target/ARM/ARMScheduleA57.td
llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s