[SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR.
authorSander de Smalen <sander.desmalen@arm.com>
Wed, 22 Sep 2021 09:59:21 +0000 (10:59 +0100)
committerSander de Smalen <sander.desmalen@arm.com>
Wed, 22 Sep 2021 12:32:36 +0000 (13:32 +0100)
commitd5681f1d688a45c000dd1e2c4f4d3678e0440b94
treed9dd68d4395b97c01f48b21aa5af68b135c9a3d7
parentf099ac838e6bce8b743a71c2fc46c1699eae8dc3
[SelectionDAG] Add PromoteIntOp_INSERT_SUBVECTOR.

This is required to codegen something like:
  <vscale x 8 x i16> @llvm.experimental.vector.insert(<vscale x 8 x i16> %vec,
                                                      <vscale x 2 x i16> %subvec,
                                                      i64 %idx)
where the output vector is legal, but the input vector needs promoting.

It implements this by performing the whole operation on the promoted type,
and then truncating the result.

Reviewed By: david-arm, craig.topper

Differential Revision: https://reviews.llvm.org/D110059
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
llvm/test/CodeGen/AArch64/sve-insert-vector.ll