drm/i915/skl+: use linetime latency if ddb size is not available
authorKumar, Mahesh <mahesh1.kumar@intel.com>
Wed, 17 May 2017 11:58:29 +0000 (17:28 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 17 May 2017 21:34:21 +0000 (14:34 -0700)
commitd555cb5827d603244969e08444340e3db78c8a37
treeb56cfeff4f4fb4043aeb519436662e33a5dadd59
parentd2f5e36df61f4f06b9a52605fba23b3c3608efca
drm/i915/skl+: use linetime latency if ddb size is not available

This patch make changes to use linetime latency if allocated
DDB size during plane watermark calculation is not available.
linetime is the time, display engine takes to fetch one line worth of
pixels with given pixel clock rate.
This is required to implement new DDB allocation algorithm.

In New Algorithm DDB is allocated based on WM values, because of which
number of DDB blocks will not be available during WM calculation,
So this "linetime latency" is suggested by SV/HW team to be used during
switch-case for WM blocks selection.
linetime latency us = pipe horizontal total pixels/adjusted pixel rate MHz

Changes since v1:
 - Rebase on top of Paulo's patch series
Changes since v2:
 - Fix if-else condition (pointed by Maarten)
Changes since v3:
 - Use common function for timetime_us calculation (Paulo)
 - rebase on drm-tip
Changes since v4:
 - Use consistent name for fixed_point operation
Changes since v5:
 - Improve commit message
 - rename skl_get_linetime_us to intel_get_linetime_us
 - fix watermark result selection (Matt)

Signed-off-by: "Mahesh Kumar" <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170517115831.13830-11-mahesh1.kumar@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_pm.c