ARM: tegra30: cpuidle: add powered-down state for CPU0
authorJoseph Lo <josephl@nvidia.com>
Wed, 31 Oct 2012 09:41:21 +0000 (17:41 +0800)
committerStephen Warren <swarren@nvidia.com>
Thu, 15 Nov 2012 22:09:22 +0000 (15:09 -0700)
commitd552920a02759cdc45d8507868de10ac2f5b9a18
tree2c3c5f805e1657f64088631e63c145cc43739608
parent01459c69dd48badeb7833c3293e43f7b8ae75e31
ARM: tegra30: cpuidle: add powered-down state for CPU0

This is a power gating idle mode. It support power gating vdd_cpu rail
after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can
enter this state only when all secondary CPU is offline. We need to take
care and make sure whole secondary CPUs were offline and checking the
CPU power gate status. After that, the CPU0 can go into "powered-down"
state safely. Then shut off the CPU rail.

Be aware of that, you may see the legacy power state "LP2" in the code
which is exactly the same meaning of "CPU power down".

Base on the work by:
Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/cpuidle-tegra30.c
arch/arm/mach-tegra/pm.c
arch/arm/mach-tegra/pm.h
arch/arm/mach-tegra/sleep-tegra30.S
arch/arm/mach-tegra/sleep.S
arch/arm/mach-tegra/sleep.h