cxl/core/port: Clarify decoder creation
authorBen Widawsky <ben.widawsky@intel.com>
Mon, 31 Jan 2022 21:33:13 +0000 (13:33 -0800)
committerDan Williams <dan.j.williams@intel.com>
Wed, 9 Feb 2022 06:57:28 +0000 (22:57 -0800)
commitd54c1bbe2d34e301382968d8b05bd8162e8f60fb
tree8230f4fb5e1930b4ba2f9615a358b741b5240960
parent608135db1b790170d22848815c4671407af74e37
cxl/core/port: Clarify decoder creation

Add wrappers for the creation of decoder objects at the root level and
switch level, and keep the core helper private to cxl/core/port.c. Root
decoders are static descriptors conveyed from platform firmware (e.g.
ACPI CFMWS). Switch decoders are CXL standard decoders enumerated via
the HDM decoder capability structure. The base address for the HDM
decoder capability structure may be conveyed either by PCIe or platform
firmware (ACPI CEDT.CHBS).

Additionally, the kdoc descriptions for these helpers and their
dependencies is updated.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
[djbw: fixup changelog, clarify kdoc]
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164366463014.111117.9714595404002687111.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/acpi.c
drivers/cxl/core/port.c
drivers/cxl/cxl.h