Merge branch 'CR_737_CLOCK_TREE_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'
authorandy.hu <andy.hu@starfivetech.com>
Thu, 28 Apr 2022 11:35:45 +0000 (11:35 +0000)
committerandy.hu <andy.hu@starfivetech.com>
Thu, 28 Apr 2022 11:35:45 +0000 (11:35 +0000)
commitd544177ab529ef1272299a452a1ea3bfcb016fe7
tree4b9a3af4a3797d909159034f66068016f88247e3
parentbf567cf98e03a636e5bf0af7a63e7b00dd5c39a0
parent3d5de8ba3d12e054ae292273aedf0c9bddb76f98
Merge branch 'CR_737_CLOCK_TREE_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'

clk:starfive: Add isp clock tree driver

See merge request sdk/sft-riscvpi-linux-5.10!32
arch/riscv/boot/dts/starfive/jh7110.dtsi