i2c: piix4: Add EFCH MMIO support for SMBus port select
authorTerry Bowman <terry.bowman@amd.com>
Wed, 9 Feb 2022 17:27:16 +0000 (11:27 -0600)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 25 May 2022 07:57:22 +0000 (09:57 +0200)
commitd46b4ff3bb0bf707253ccba412ebf9a6b3aa1433
tree9190d517c0cd1d9380522a93d8643b7bfce35a7c
parentc4194b266bf7ef8ac5c38394b1427255598fb084
i2c: piix4: Add EFCH MMIO support for SMBus port select

commit 381a3083c6747ae5cdbef9b176d57d1b966db49f upstream.

AMD processors include registers capable of selecting between 2 SMBus
ports. Port selection is made during each user access by writing to
FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during
SMBus port selection because cd6h/cd7h port I/O is not available on
later AMD processors.

Signed-off-by: Terry Bowman <terry.bowman@amd.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Cc: Mario Limonciello <Mario.Limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/i2c/busses/i2c-piix4.c