[AArch64] Use 16 bytes as preferred function alignment on Cortex-A57.
authorFlorian Hahn <florian.hahn@arm.com>
Fri, 7 Jul 2017 10:43:01 +0000 (10:43 +0000)
committerFlorian Hahn <florian.hahn@arm.com>
Fri, 7 Jul 2017 10:43:01 +0000 (10:43 +0000)
commitd4550baf3b6dceceaa13e91563b053538e3697bb
tree94a3582b1c4c842caee80edf90d38ca8864b1566
parentb249c9bcf500ac413d62daa928e8bb5e9ddebe21
[AArch64] Use 16 bytes as preferred function alignment on Cortex-A57.

Summary:
This change gives a 0.89% speed on execution time, a 0.94% improvement
in benchmark scores and a 0.62% increase in binary size on a Cortex-A57.
These numbers are the geomean results on a wide range of benchmarks from
the test-suite, SPEC2000, SPEC2006 and a range of proprietary suites.

The software optimization guide for the Cortex-A57 recommends 16 byte
branch alignment.

Reviewers: t.p.northover, mcrosier, javed.absar, kristof.beyls, sbaranga

Reviewed By: kristof.beyls

Subscribers: aemerson, rengolin, llvm-commits

Differential Revision: https://reviews.llvm.org/D34954

llvm-svn: 307389
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/test/CodeGen/AArch64/preferred-function-alignment.ll