powerpc/8xx: Better readibility of ERRATA CPU6 handling
authorLEROY Christophe <christophe.leroy@c-s.fr>
Fri, 19 Sep 2014 08:36:09 +0000 (10:36 +0200)
committerScott Wood <scottwood@freescale.com>
Sat, 8 Nov 2014 00:10:42 +0000 (18:10 -0600)
commitd3e40262e7d05236bf4c2c4fdf007589ba8af97a
tree6a8175e21eed90263752a8d5375f76a7037ff44f
parent959d6173b5cccceff47cc2d25feeaac2f96df0e0
powerpc/8xx: Better readibility of ERRATA CPU6 handling

This patch hiddes that SPR address needed for CPU6 ERRATA handling in the macro.
Then we don't have to worry about this address directly in the code.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/kernel/head_8xx.S