clk: samsung: exynos542x: add clock ID for G3D performance enhancement
authorInki Dae <inki.dae@samsung.com>
Fri, 23 Nov 2018 01:29:01 +0000 (10:29 +0900)
committerJunghoon Kim <jhoon20.kim@samsung.com>
Thu, 14 Feb 2019 05:57:38 +0000 (14:57 +0900)
commitd3ca906131945d3f7b3cb4702ebc068749939b29
treed7366e7993d191de5fa4935421da6b77193dd7d4
parentd69ff0ab13b2d59375a024b2cc8e7038cdbf4115
clk: samsung: exynos542x: add clock ID for G3D performance enhancement

This patch adds clock IDs for CLKMUX_ACLK_G3D and DPLL_CTRL,
and these IDs will be used by device tree to change G3D's parent
clock to DPLL(600MHz) instead of VPLL(400MHz).

Change-Id: Ia2c11331d42a73e095fd4c9deb64e9fb162c511d
Signed-off-by: Inki Dae <inki.dae@samsung.com>
drivers/clk/samsung/clk-exynos5420.c
include/dt-bindings/clock/exynos5420.h