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(parent: 8f66fce) | patch
parisc: Fix mask used to select futex spinlock
authorJohn David Anglin <dave.anglin@bell.net>
Tue, 21 Dec 2021 18:33:16 +0000 (13:33 -0500)
committerHelge Deller <deller@gmx.de>
Tue, 21 Dec 2021 20:15:59 +0000 (21:15 +0100)
commitd3a5a68cff47f6eead84504c3c28376b85053242
treecd9b3ec6f063d9f70d5b2194de11f1e220644featree | snapshot
parent8f66fce0f46560b9e910787ff7ad0974441c4f9ccommit | diff
parisc: Fix mask used to select futex spinlock

The address bits used to select the futex spinlock need to match those used in
the LWS code in syscall.S. The mask 0x3f8 only selects 7 bits.  It should
select 8 bits.

This change fixes the glibc nptl/tst-cond24 and nptl/tst-cond25 tests.

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Fixes: 53a42b6324b8 ("parisc: Switch to more fine grained lws locks")
Cc: stable@vger.kernel.org # 5.10+
Signed-off-by: Helge Deller <deller@gmx.de>
arch/parisc/include/asm/futex.h diff | blob | history
Domain: System / Kernel;