pinctrl: qcom: spmi-gpio: correct parent irqspec translation
authorDavid Collins <collinsd@codeaurora.org>
Thu, 16 Sep 2021 13:21:37 +0000 (18:51 +0530)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 16 Sep 2021 23:06:44 +0000 (01:06 +0200)
commitd36a97736b2cc9b13db0dfdf6f32b115ec193614
tree5ee4e5926fc3a71cb098d24222b25c8086294245
parentacd47b9f28e55b505aedb842131b40904e151d7c
pinctrl: qcom: spmi-gpio: correct parent irqspec translation

pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI controller irqspec.  When they do
this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
This translation results in an incorrect irqspec for secondary
PMICs that don't have a slave ID of 0 as well as for PMIC chips
which have GPIO peripherals located at a base address other than
0xC000.

Correct this issue by passing the slave ID of the pinctrl-spmi-
gpio device's parent in the SPMI controller irqspec and by
calculating the peripheral ID base from the device tree 'reg'
property of the pinctrl-spmi-gpio device.

Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: satya priya <skakit@codeaurora.org>
Fixes: ca69e2d165eb ("qcom: spmi-gpio: add support for hierarchical IRQ chip")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1631798498-10864-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-spmi-gpio.c