PCI: Allow PCIe Capability link-related register access for switches
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 27 Aug 2013 15:54:40 +0000 (09:54 -0600)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 28 Aug 2013 17:28:22 +0000 (11:28 -0600)
commitd3694d4fa3f44f6a295f8ab064937c8a1549d174
tree84ef7e23578a22d0819f5f2064bf813e071d43eb
parentbd6fb762b595fb83758ae50d3610223244234a2d
PCI: Allow PCIe Capability link-related register access for switches

Every PCIe device has a link, except Root Complex Integrated Endpoints
and Root Complex Event Collectors.  Previously we didn't give access
to PCIe capability link-related registers for Upstream Ports, Downstream
Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly
returned zero.  See PCIe spec r3.0, sec 7.8 and 1.3.2.3.

Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com
Reported-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-By: Jiang Liu <jiang.liu@huawei.com>
drivers/pci/access.c