irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GIC
authorNishanth Menon <nm@ti.com>
Thu, 26 Jun 2014 07:10:34 +0000 (12:40 +0530)
committerJason Cooper <jason@lakedaemon.net>
Mon, 30 Jun 2014 19:21:04 +0000 (19:21 +0000)
commitd360892d37b5d0e82595001c4be6d49311e2c265
treee9a467f57ae361080299510e7960039c355b1518
parent9a34f73fb75531507760b957407fb55278b38ae8
irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GIC

On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
132, 133 are direct wired to hardware blocks bypassing crossbar.
This quirky implementation is *NOT* supposed to be the expectation
of crossbar hardware usage. However, these are already marked in our
description of the hardware with SKIP and RESERVED where appropriate.

Unfortunately, we need to be able to refer to these hardwired IRQs.
So, to request these, crossbar driver can use the existing information
from it's table that these SKIP/RESERVED maps are direct wired sources
and generic allocation/programming of crossbar should be avoided.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Link: https://lkml.kernel.org/r/1403766634-18543-17-git-send-email-r.sricharan@ti.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Documentation/devicetree/bindings/arm/omap/crossbar.txt
drivers/irqchip/irq-crossbar.c