[AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for sel
authorSander de Smalen <sander.desmalen@arm.com>
Mon, 22 May 2023 13:37:19 +0000 (13:37 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Mon, 22 May 2023 13:51:02 +0000 (13:51 +0000)
commitd33910a8cc838587886a7302e7f8e6761bb5a89c
tree48bc94236a0d88e0ce4b38bede557f25f8b349eb
parent50f0ee8fbfc1f597ae7d2d49e0996c4338e5652f
[AArch64][SME2/SVE2p1] Add predicate-as-counter intrinsics for sel

These intrinsics are used to implement the sel intrinsics that selects
a tuple of 2 or 4 values based on a predicate-as-counter operand, e.g.

  __attribute__((arm_streaming))
  svuint8x2_t svsel[_u8_x2](svcount_t png, svuint8x2_t zn, svuint8x2_t zm);

  __attribute__((arm_streaming))
  svuint8x4_t svsel[_u8_x4](svcount_t png, svuint8x4_t zn, svuint8x4_t zm);

As described in https://github.com/ARM-software/acle/pull/217

Reviewed By: CarolineConcatto

Differential Revision: https://reviews.llvm.org/D150951
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx2.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/sve2p1-intrinsics-selx4.ll [new file with mode: 0644]