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author	Konstantin Schwarz <konstantin.schwarz@hightec-rt.com>
	Mon, 6 Sep 2021 14:17:44 +0000 (16:17 +0200)
committer	Konstantin Schwarz <konstantin.schwarz@hightec-rt.com>
	Thu, 16 Sep 2021 08:42:46 +0000 (10:42 +0200)
commit	d2e66d7fa46b14a749ff8686ecccf66292b7bc6b
tree	df9f8a9dab876439a1002aec39a889e3f6146055	tree \| snapshot
parent	e4da0f9657b475f62b68a7e7e6cc06855e2f4985	commit \| diff

[GlobalISel] Add a combine for and(load , mask) -> zextload

This only handles simple masks, not shifted masks, for now.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D109357

15 files changed:

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h		diff \| blob \| history
llvm/include/llvm/Target/GlobalISel/Combine.td		diff \| blob \| history
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp		diff \| blob \| history
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-and-mask.mir	[new file with mode: 0644]	blob
llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-load-and-mask.mir	[new file with mode: 0644]	blob
llvm/test/CodeGen/AMDGPU/ctlz.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ds-alignment.ll		diff \| blob \| history

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