iio: dac: ad5421: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:25 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:15 +0000 (11:53 +0100)
commitd2b240d3d31c66df4d2da54c75ff8e27a0e006c3
tree49dec4359035fc854c624d1397b24d2839c7cb08
parent94ec314e1bd686b669c24385ce2dbc967eb74147
iio: dac: ad5421: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Update the comment to include 'may'.

Fixes: 5691b23489db ("staging:iio:dac: Add AD5421 driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-46-jic23@kernel.org
drivers/iio/dac/ad5421.c