i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.
authorFrancisco Jerez <currojerez@riseup.net>
Thu, 1 Sep 2016 23:55:46 +0000 (16:55 -0700)
committerFrancisco Jerez <currojerez@riseup.net>
Wed, 14 Sep 2016 21:50:53 +0000 (14:50 -0700)
commitd28cfa35fec75c367b940ff829ba8eaa035fbd22
treeefdc81a8baa05246ca5d9b76c8e295aa4c43c63c
parentc458eeb94620fbce0a37474fc292545002d67f76
i965/vec4: Add wrapper functions for vec4_instruction::regs_read and ::regs_written.

This is in preparation for dropping vec4_instruction::regs_read and
::regs_written in favor of more accurate alternatives expressed in
byte units.  The main reason these wrappers are useful is that a
number of optimization passes implement dataflow analysis with
register granularity, so these helpers will come in handy once we've
switched register offsets and sizes to the byte representation.  The
wrapper functions will also make sure that GRF misalignment (currently
neglected by most of the back-end) is taken into account correctly in
the calculation of regs_read and regs_written.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
src/mesa/drivers/dri/i965/brw_ir_vec4.h
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
src/mesa/drivers/dri/i965/brw_vec4.cpp
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp
src/mesa/drivers/dri/i965/brw_vec4_dead_code_eliminate.cpp
src/mesa/drivers/dri/i965/brw_vec4_live_variables.cpp