review.tizen.org Git - platform/upstream/llvm.git/commit

projects / platform / upstream / llvm.git / commit

author	Jay Foad <jay.foad@amd.com>
	Tue, 1 Dec 2020 11:55:50 +0000 (11:55 +0000)
committer	Jay Foad <jay.foad@amd.com>
	Wed, 2 Dec 2020 10:11:42 +0000 (10:11 +0000)
commit	d28624a209484c440290472dadc2673c8a0b47e7
tree	5369411188a45f0daa97db2d253ffcfab8b900d4	tree \| snapshot
parent	1daace3fbb307d09ef8445bede5559143da1712d	commit \| diff

[AMDGPU] Stop adding an implicit def of vcc_hi for wave32

This doesn't seem to be needed for anything.

Differential Revision: https://reviews.llvm.org/D92400

151 files changed:

llvm/lib/Target/AMDGPU/SIISelLowering.cpp		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.s96.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usubo.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.icmp.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/SRSRC-GIT-clobber-check.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/add3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/add_shl.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/amdpal-elf.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/and_or.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cc-update.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/flat-scratch.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idot2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idot4s.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idot4u.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idot8s.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idot8u.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/imm16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/offset-split-flat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/offset-split-global.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/or3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/preserve-hi16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/shl_add.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/shl_or.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/smrd.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/xor3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/xor_add.ll		diff \| blob \| history

Domain: System / Toolchain;

RSS Atom