projects / sdk / emulator / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: a242881) | patch
target-ppc: Add POWER8's TIR SPR
authorAlexey Kardashevskiy <aik@ozlabs.ru>
Wed, 4 Jun 2014 12:50:55 +0000 (22:50 +1000)
committerAlexander Graf <agraf@suse.de>
Mon, 16 Jun 2014 11:24:44 +0000 (13:24 +0200)
commitd1a721ab816d1b954c0988aafdec4e109b953a9f
treedcb64980cc93a87f9b3319f1321f79b7302b9b5ftree | snapshot
parenta242881405811ec6e6134452311f1cd1896c8adacommit | diff
target-ppc: Add POWER8's TIR SPR

This adds TIR (Thread Identification Register) SPR first defined for server
CPUs in PowerISA 2.07.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
target-ppc/cpu.h diff | blob | history
target-ppc/translate_init.c diff | blob | history
Domain: SDK / Emulator;