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(parent: 4c7d45f) | patch
drm/amd/display: Adding DCN1 registers
authorMikita Lipski <mikita.lipski@amd.com>
Tue, 17 Oct 2017 14:53:43 +0000 (10:53 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Dec 2017 21:33:21 +0000 (16:33 -0500)
commitd182fddbc731a60810fc3b59694c6054a3b180a6
treee4a4c80306deb339d2ef8872049406137a055b29tree | snapshot
parent4c7d45fae841a7f3e2d129185acf66f1c7ae37e5commit | diff
drm/amd/display: Adding DCN1 registers

Registers added to definition list that are required
for multi display synchronization

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h diff | blob | history
Domain: System / Kernel; Licenses: GPL-2.0;