[PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to leverage...
authorQingShan Zhang <qshanz@cn.ibm.com>
Fri, 13 Mar 2020 07:25:55 +0000 (07:25 +0000)
committerQingShan Zhang <qshanz@cn.ibm.com>
Fri, 13 Mar 2020 07:28:28 +0000 (07:28 +0000)
commitd0fb34dc0967994b71e90351636215976279026a
treec0684d0d5e2623fc7f65010c3f7fd64655fccab0
parent09c8f38924d4bc302984de7bf67f4dbae15c38dc
[PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to leverage the combine rules

The PPCISD::SExtVElems was added by commit https://reviews.llvm.org/D34009. However,
we have another ISD node ISD::SIGN_EXTEND_INREG that perfectly match the semantics
of SExtVElems. And the DAGCombiner has some combine rules for SIGN_EXTEND_INREG
that produce better code.

Differential Revision: https://reviews.llvm.org/D70771
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td