OMAPDSS: fix rounding when calculating fclk rate
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 13 Feb 2014 09:36:22 +0000 (11:36 +0200)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Mon, 14 Apr 2014 11:52:08 +0000 (14:52 +0300)
commitd0e224f9963b79610850b2a10622182176658022
tree418881116f13641add903db6dc6dc4dc119fc044
parent8d018647e00876e0c0e8dba13c52c882be4e1678
OMAPDSS: fix rounding when calculating fclk rate

"clk: divider: fix rate calculation for fractional rates" patch (and
similar for TI specific divider) fixes the clk-divider's rounding. This
patch updates the DSS driver to round the rates accordingly.

This fixes the DSS's warnings about clock rate mismatch, and also fixes
the wrong fclk rate being set.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Tested-by: Christoph Fritz <chf.fritz@googlemail.com>
Tested-by: Marek Belisko <marek@goldelico.com>
drivers/video/omap2/dss/dss.c