clk: socfpga: remove the setting of clk-phase for sdmmc_clk
authorDinh Nguyen <dinguyen@kernel.org>
Mon, 14 Nov 2022 23:02:16 +0000 (17:02 -0600)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 7 Dec 2022 12:22:37 +0000 (13:22 +0100)
commitd0ce6aca9ddf1177d9f2757c9fed502682934343
tree7eca4114c79ed7e256311a817fb4c546b8c0d955
parentef87bd81cb881377c1eaf512167b0522c825b012
clk: socfpga: remove the setting of clk-phase for sdmmc_clk

Now that the SDMMC driver supports setting the clk-phase, we can remove
the need to do it in the clock driver.

Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20221114230217.202634-5-dinguyen@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/clk/socfpga/clk-gate-a10.c
drivers/clk/socfpga/clk-gate.c
drivers/clk/socfpga/clk.h