ram: rk3399: Add rank detection support
authorJagan Teki <jagan@amarulasolutions.com>
Mon, 15 Jul 2019 18:28:54 +0000 (23:58 +0530)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 20 Jul 2019 15:54:32 +0000 (23:54 +0800)
commitd0ba88f5dd675af7d2bb93d33ef08f96af2ced51
treee4804603c43d3115703f31ce2e44fd450fe91d2b
parent1ff5283d92b25e449358bd88bc0b18db4be61d4f
ram: rk3399: Add rank detection support

Right now the rk3399 sdram driver assume that the board
has configured with 2 channels, so any possibility to
enable single channel on the same driver will encounter
channel #1 data training failure.

Log:
U-Boot TPL board init
sdram_init: data training failed
rk3399_dmc_init DRAM init failed -5

So, add an algorithm that can capable to compute the active
or configured rank with associated channel like
a) do rank loop to compute the active rank, with associated
   channel numbers
b) then, succeed the data training only for configured channel
c) preserve the rank for given channel
d) do channel loop for setting the active channel
e) if given rank is zero or inactive on the specific channel,
   clear the timings for the associated channel
f) finally, return error if number of channels is zero

Tested in NanoPI-NEO4 since it support single channel sdram
configuration.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(add PI_READ_GATE_TRAINING for LPDDR3 to support rk3399-evb case)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
drivers/ram/rockchip/sdram_rk3399.c