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(parent: 5f140cc) | patch
arm64/perf: Add Cavium ThunderX PMU support
authorJan Glauber <jglauber@cavium.com>
Thu, 18 Feb 2016 16:50:11 +0000 (17:50 +0100)
committerWill Deacon <will.deacon@arm.com>
Thu, 18 Feb 2016 17:23:39 +0000 (17:23 +0000)
commitd0aa2bffcf9847133fd75b9c829da4faded81977
treead933f41bfdec955106e492c61550e1f46524d1dtree | snapshot
parent5f140ccef3e1f15873c8e2c47d15b03099623ec0commit | diff
arm64/perf: Add Cavium ThunderX PMU support

Support PMU events on Caviums ThunderX SOC. ThunderX supports
some additional counters compared to the default ARMv8 PMUv3:

- branch instructions counter
- stall frontend & backend counters
- L1 dcache load & store counters
- L1 icache counters
- iTLB & dTLB counters
- L1 dcache & icache prefetch counters

Signed-off-by: Jan Glauber <jglauber@cavium.com>
[will: capitalisation]
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/perf_event.c diff | blob | history
Domain: System / Kernel;