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(parent: 75a184d) | patch
[AArch64][SVE] Add unpredicated ld1/st1 patterns for reg+reg addressing modes
authorBradley Smith <bradley.smith@arm.com>
Thu, 28 Jan 2021 12:39:39 +0000 (12:39 +0000)
committerBradley Smith <bradley.smith@arm.com>
Mon, 15 Mar 2021 12:36:28 +0000 (12:36 +0000)
commitd09ae9328f67fd419ab8cea0e73dcdfe8d75f481
tree5691893a37aee60a093215c8f1bd6726aae2e22etree | snapshot
parent75a184dacfa1fb0835e93ad660ab155783850b9ccommit | diff
[AArch64][SVE] Add unpredicated ld1/st1 patterns for reg+reg addressing modes

Differential Revision: https://reviews.llvm.org/D95677
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td diff | blob | history
llvm/test/CodeGen/AArch64/named-vector-shuffles-sve.ll diff | blob | history
llvm/test/CodeGen/AArch64/sve-fold-vscale.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll diff | blob | history
llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll [new file with mode: 0644] blob
llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll diff | blob | history
llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll [new file with mode: 0644] blob
Domain: System / Toolchain;