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(parent: 38ce00a) | patch
clk: imx8mp: remove SYS PLL 1/2 clock gates
authorPeng Fan <peng.fan@nxp.com>
Fri, 25 Feb 2022 08:17:33 +0000 (16:17 +0800)
committerAbel Vesa <abel.vesa@nxp.com>
Fri, 4 Mar 2022 15:06:29 +0000 (17:06 +0200)
commitd097cc045b64948ca3048ced4a43cc74eaf641a5
treef9d29688d5de7aba0576727c19d15ecedc537f70tree | snapshot
parent38ce00adc16319544c8c56edd36324d2c1b98a50commit | diff
clk: imx8mp: remove SYS PLL 1/2 clock gates

Remove the PLL 1/2 gates as it make AMP clock management harder without
obvious benifit.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220225081733.2294166-4-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
drivers/clk/imx/clk-imx8mp.c diff | blob | history
Domain: System / Kernel;