[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
authorchendewen <chendewen3@huawei.com>
Wed, 18 Jan 2023 03:02:46 +0000 (11:02 +0800)
committerzhongyunde <zhongyunde@huawei.com>
Wed, 18 Jan 2023 03:06:13 +0000 (11:06 +0800)
commitd0942df43e5eb02bdcc44d499d62924214feef63
tree4fbe1a8c774a1f74e4c858599ad9614bdc43b322
parent1a1ddf05cb8e86e8b6fa17525cff43026ed3883a
[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.

The REINTERPRET_CAST operation generates redundant and and ptrue instructions.
For some instructions, this is redundant, because its inactive lanes are zeroed by construction.
For example. Codegen before:
```
facgt p2.d, p0/z, z4.d, z1.d
ptrue p1.d
and p1.b, p2/z, p2.b, p1.b
```
After:
```
facgt p1.d, p0/z, z4.d, z1.d
```
ref: https://reviews.llvm.org/D129851

Reviewed By:sdesmalen,paulwalker-arm

Differential Revision:https://reviews.llvm.org/D141469
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve2-intrinsics-reinterpret.ll [new file with mode: 0644]