ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing
authorMarek Vasut <marex@denx.de>
Tue, 30 Aug 2022 12:34:26 +0000 (14:34 +0200)
committerStefano Babic <sbabic@denx.de>
Sun, 18 Sep 2022 20:56:10 +0000 (22:56 +0200)
commitd07206569031ced28b10b1b6f0270dcfdd46b781
tree3ca844216cd8f06994d5e1c75d65f7e5a938279f
parent7b20d3d9348941245291968043270521675b2e54
ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing

Adjust the DRAM timing settings for this board per ones provided
by hardware department. The change is applied to the LPDDR4 MR11
register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes
stability issues on subset of boards. The DDR PHY PIE block has
been updated accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
board/data_modul/imx8mm_edm_sbc/lpddr4_timing_2G_32.c
board/data_modul/imx8mm_edm_sbc/lpddr4_timing_4G_32.c