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author	Han-Kuan Chen <hankuan.chen@sifive.com>
	Tue, 31 Jan 2023 06:40:08 +0000 (22:40 -0800)
committer	Han-Kuan Chen <hankuan.chen@sifive.com>
	Sat, 4 Feb 2023 06:42:08 +0000 (22:42 -0800)
commit	d02b9869b2422a7995505e3ef0900da7ef822497
tree	48021046c7ec0054ad19de8e895f10d2ba7857b8	tree \| snapshot
parent	92d3672452db260f431b9219faf57c5f8c7b876b	commit \| diff

[RISCV] Don't use constantpool for floating-point value if the value can be easily constructed by integer sequence and a floating-point move.

In addition, this commit does the following combine

vfmv.v.f + fmv.[dhw].x -> vmv.v.x
vfmv.s.f + fmv.[dhw].x -> vmv.s.x
vfmerge.vfm + fmv.[dhw].x -> vmerge.vxm

Differential Revision: https://reviews.llvm.org/D142953

52 files changed:

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVISelLowering.cpp		diff \| blob \| history
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td		diff \| blob \| history
llvm/test/CodeGen/RISCV/calling-conv-half.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/codemodel-lowering.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-convert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-round-conv-sat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-round-conv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/float-select-verify.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/fp-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-convert.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-intrinsics.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-round-conv-sat.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/half-round-conv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/float-round-conv.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/floor-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/rint-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/round-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/select-const.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/select-optimize-multiple.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/zfh-imm.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/zfhmin-imm.ll		diff \| blob \| history

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